Archive
The archive is the location where compressed snapshots of a specific ip's version exist. The compressed ip files are unable to be referenced as dependencies, but they are able to be installed to the cache for usage. The ip's in the archvie are considered downloaded.
Blueprint
A blueprint is a single file that lists all the necessary source files and auxiliary files for the build process of a particular target. The source files are listed in topologically-sorted order. The blueprint is generated by Orbit during the planning stage of the build process, and is typically immediately used as input to the execution stage of the build process.
A blueprint can store the information collected from the planning stage in different file formats, called schemes. The default scheme is tab-separated values (TSV).
Cache
The cache is the location where immutable references to a specific ip's version exist. An ip's dependencies are referenced from the cache. The ip that are found at the cache level are considered installed.
Catalog
The catalog is the user's entire space of currently known ip to Orbit. It consists of 3 main layers: cache, downloads, channels.
Channels
The channels are a set of decentralized registries that store the manifests for versions of ip. No source code is stored in a channel, however, Orbit is able to use the manifest as means to download that ip to the archive for local filesystem access. The ip that are found at the channels level are considered available. Users are encouraged to create and share their own channels.
Fileset
A fileset is a glob-style pattern for collecting files under a given name. Filesets are used to group common files together into the blueprint during the planning stage of the build process. A target can define its own filesets.
Intellectual Property (IP)
An ip is a project with a manifest file at its root directory. At a minimum, an ip has two attributes: a name and a version.
Ip Specification (spec)
The spec describes the format for identifying and referencing an ip. Each ip in the user's catalog must have a unique spec. The format of a ip's spec is: <name>[:<version>].
Local Ip
The local ip is the ip detected from the current working directory on the command-line. Some commands can only be executed from the local ip, such as orbit lock and orbit build.
Lockfile
A lockfile is a file that exactly describes an ip's dependencies. It is generated and maintained by Orbit. The lockfile should be checked into your version control system for reproducible builds. It is not to be manually edited by the user.
From the lockfile, Orbit is able to download missing dependencies, install missing dependencies, and verify the data integrity of installed dependencies.
Manifest
A manifest is a file that decscribes an ip recognized by Orbit. Manifest files
are exactly named Orbit.toml. The manifest is intended to be written by the user.
Orbit.lock
See lockfile.
Orbit.toml
See manifest.
Package
See IP.
Profile
A profile is a user-defined group of plugins, settings, and/or channels under a single directory. A profile does not necessarily have to have all listed aspects in order to be considered a "profile".
Profiles are useful for quickly sharing and maintaining common development standards and workflows among a team environment.
Project
A project is a collection of HDL source files and any other required files related to a specific application or library. Placing a manifest in a project makes it an ip.
SystemVerilog
SystemVerilog is a hardware description and hardware verification language used to model, design, simulate, test, and implement electronic systems.
Target
A target is a user-defined command that is to be invoked by Orbit during the execution stage of the build process. A target typically follows 3 steps:
- Parse the blueprint file generated from the planning stage
- Process the listed hdl files using an EDA tool
- Test the design or build an output product
Targets can accept additional arguments from the command-line and define additional filesets to be collected for the planning stage. Users are encouraged to create and share their own targets.
VHDL
VHSIC Hardware Design Language (VHDL) is a hardware descrption language to model the behavior of digitally electronic circuits.
Verilog
Verilog is a hardware description language to model electronic systems. The final standard (IEEE 1364-2005) for Verilog merged into the SystemVerilog standard. Today, Verilog has been officially part of the SystemVerilog language.